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DPRG: Re: H-bridge

Subject: DPRG: Re: H-bridge
From: Jim Brown jimbrown at airmail.net
Date: Thu Jan 22 17:53:10 CST 1998

At 04:37 AM 1/22/98 -0800, you wrote:
>I was just looking at the H-Bridge schematic you have on the web (I am in
>the process of designing one myself), and I had a couple of comments and
>questions.

I believe many of the comments you made are right.  I'll have to bow
to the other ones in our group who designed the circuit to let them
tell you why it's that way.  Hopefully they'll respond soon.

>At the bottom of the main circuit there appears to be a "1 ohm, 5W"
>resistor  (is that correct?)... is this being used for current-sensing, for
>the PWM?  It appears that the voltage which is seen by the low-pass filter
>below will be a function of the current through the bottom of the main
>circuit, so I assume that this is being used to limit the current.
>
>The quiescent current draw concerns me:  all of those pull-ups, and the
>7805 is very hot.  As far as the 7805 goes, there is a National
>Semiconductor voltage regulator (Digikey part# LM2575T-5.0-ND) which uses
>PWM to maintain the voltage but with almost no heat loss and a significant
>reduction in average power... I used a circuit straight out of the App
>notes which had almost 0 output ripple, very nice.  Some of the pull-ups
>seem redundant to me:  I understand the FET gate pull-ups (I think: you
>just want to make sure they are in saturation mode?)  but the logic
>pull-ups seem unnecessary.  Are you just working in fail-safes?  Seems like
>if you used HCT chips, the pull-ups would not be needed, but if you were
>using F or LS they might be.
>
>I'm afraid I don't understand the PWM stage at the end, but I have built a
>555 timer based PWM which should do the trick (once again, straight out of
>the apps notes), but in your circuit this then goes nowhere... my thought
>is that this PWM signal should either be demultiplexed to IN1 or IN2 (I am
>assuming it is IN2, it is cut off in the picture... seems like it should
>just be the inverted IN1) or (possibly better) it could be AND-ed to the
>enable signal... have to look at switching noise and speed issues here
though.

I think we talked about the PWM being on the top at about 200hz.
We were planning to do the PWM with a mcu, but a 555 timer should
be fine too.  It sounds like the ways you mentioned are ok too.

>The web page is pretty informative - I have been reading through the
>newsletters, looking for ideas.... and finding some.

thanks.

>Michael Kennan
>kennanm at ucs.orst.edu

- -------------- another email -----------------
>
>Have you considered using only N-channel FETs in the H-bridge?  The reason
>I ask is that P-channel FETs are often harder to find, are being
>discontinued by the manufacturers, or cost more...  of course, with all
>N-channel devices in the circuit, a voltage doubler would be required to
>give the upper to FETs a sufficient gate voltage to turn on...
>
>Michael Kennan
>kennanm at ucs.orst.edu

We first wanted to use all n-channel mosfets, but after you consider
the voltage doubling circuit, and all the trouble that goes with
it, and the cost, it was much easier just to get p-channel mosfets.
I think we could find n-channel mosfets for about $0.33 cents each,
and then the p-channel ones were about $1.00.  It great simplifies
the circuit.


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