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[DPRG] increased output drive by CMOS and TTL devices

Subject: [DPRG] increased output drive by CMOS and TTL devices
From: Mike McCarty jmccarty at ssd.usa.alcatel.com
Date: Tue Jun 26 11:45:48 CDT 2001

On Tue, 26 Jun 2001, Matt Minnis wrote:

> Does anyone have a reference list that compares all the *current* TTL 
> families to each other?
> 
> I have some, but they are very dated, and do not have the modern chip families.
> 
> This would be very nice to be able to see the differences in the different 
> families contrasted.
> 
> Thanks,
> 
> Matt Minnis

The Phillips site has nice descriptions for each family, but I don't know
of any place where there is a chart.

It would be nice to have something like this:

	Low	High	Isrc	Isink	Tlow-hi	Thi-low	Tprop	Vcc	Vcc	Isupply
Family	Thresh	Thresh	Max	Max	ns	ns	delay	Min	Max	per gate
TTL	0.4V	0.8V	400uA	16mA	2	2	10	4.95	5.05	
LSTTL

Also would want fan-in and fan-out.

Of course, some families have different speeds for different supply
voltages. And the supply current would probably be a "no load". Clock
speeds can also markedly affect supply current.

Mike
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