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[DPRG] increased output drive by CMOS and TTL devices

Subject: [DPRG] increased output drive by CMOS and TTL devices
From: Mike McCarty jmccarty at ssd.USA.ALCATEL.COM
Date: Wed Jun 27 14:22:03 CDT 2001

On Wed, 27 Jun 2001, Ralph Tenny wrote:

> Mike:
> You said that CMOS does not have fast transition times. The HCCMOS family 
> has damn fast transitions, faster than any bipolar technology except 
> (maybe) ECL. Board layout for HC may be more critical than any other 
> logic family.
> Ralph


CMOS (not HCMOS) does not have fast transition times. It depends on
source voltage, but typically CMOS had rise times 2x that for TTL. See
http://internt.isk.kth.se/elektro/kursinfo/6B2937_pulsenk/Datablad/National/AN-77.pdf

HCMOS is comparable to TTL, having 6ns rise and fall times.
See
http://www.semiconductors.philips.com/acrobat/various/HCT_FAMILY_SPECIFICATIONS.pdf 
and
http://www.dde-eda.com/ecadman/guide/hs.html

           Family                 Rise time
                                     ns

           74LS                      6
           74F                       2
           ECL 10K                   1.5
           ECLips                    0.45
           GaAs                      0.20

TTL has rise/fall times intermediate between 74LS and 74F, or on the
order of 5ns.

I think that a ratio of 4:1 is a pretty large one. ECL is faster than
HCMOS to the point that there is really no comparison. There is no
"maybe" in ECL is faster than HCMOS.

ECL is not even saturating logic; it is more like very fast OP AMPS,
and of all the logic families I have dealt with, *the* most difficult
to use. Any trace over 1 inch requires careful termination. Of course,
ECL, like TTL, 4000 series CMOS, and 74C CMOS, is pretty much obsolete
now. (So are 74F and 74ALS for that matter.)

Note that GaAs is a bipolar techonology. GaAs is 30x as fast as HCMOS.
I think this qualifies as faster than HCMOS. So HCMOS is not faster
than any other bipolar technology.

I certainly would not say that HCMOS might be "more critical than any
other logic family."

Apropos of parallelling gates, National specifically supports doing that
with CMOS gates. See

http://internt.isk.kth.se/elektro/kursinfo/6B2937_pulsenk/Datablad/National/AN-77.pdf

This is, of course, for the old 4000 and 74C series, not the B series
or HC(T).

Here are some interesting pages I came across

http://ugweb.cs.ualberta.ca/~c280/manual/section3_1.html
http://www.ece.drexel.edu/ECE/ECE-L301/LSTTL_list.pdf
http://www.dde-eda.com/ecadman/guide/hs.html

Mike
-- 
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