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[DPRG] I2C EEPROM Question

Subject: [DPRG] I2C EEPROM Question
From: Dale Wheat dale at dalewheat.com
Date: Tue Feb 8 07:29:24 CST 2005


 > Does anyone have experience using I2C EEPROMs from
 > PIC? Specifically, I'm looking for an answer to a
 > question on the datasheet for the 24LC515 chip.

I have no direct experience with this part, but I have used Microchip 
I2C EEPROMS in the past.

 > The section that describes the Addressing lines
 > (A0-A2) describes A2 as a non-usable Address line
 > which must be tied to Vcc for the chip to operate.
 > Unfortunately, it doesn't say anything more about this
 > address line.

The datasheet refers to A2 as a "non-configurable chip select".

The device is too large for normal I2C addressing.  It is divided 
internally into 2 segments of 256K bits each.  A "block select" bit must 
be transmitted with the address.

Reduced bus device count is typical for larger devices using I2C.

 > I'm wondering if this is a power-down function, or if
 > I pulled the A2 line to Vss would the chip be
 > disabled, yet retain memory... thus in effect allowing
 > for the selection of up to 8 of these devices on an
 > I2C bus using three address lines and a signal
 > inverter on the A2 line between each set of 4 EEPROMs.

It's not a power down signal.  The device will automatically go into 
power down after each transfer.

Using the A2 line as a chip select input would disable access to the 
chip, and I would expect it to retain the memory.

I suspect your scheme of addressing 8 devices on the bus should work. 
That's a lotta EEPROM (512K bytes).  Wouldn't it be easier to use a 
serial data flash part?

I hope this helps.


Dale Wheat
(972) 486-1317

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