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[DPRG] I2C EEPROM Question

Subject: [DPRG] I2C EEPROM Question
From: Rick J. Bickle rbickle at swbell.net
Date: Tue Feb 8 11:13:45 CST 2005

Scott,

Since the datasheet describes pin A2 as a "chip select", you should be
able to use it as such.
When "1", the chip will respond to the I2C bus, when "0" it will not.
You could have multiple banks of 4 devices per bank switched with the A2
pin.

Also, there is a "b" version of these chips which ignores the address
bits. Make sure you don't get that one.

If you would care for some "bit banging" code for I2C, I have written
it. I have also written interrupt driven I2C code for several of the
Philips '51 derivatives.

Rick


-----Original Message-----
From: dprglist-bounces at dprg.org [mailto:dprglist-bounces at dprg.org] On
Behalf Of Mr S
Sent: Monday, February 07, 2005 10:37 PM
To: dprglist at dprg.org
Subject: [DPRG] I2C EEPROM Question


This might be an odd question, but here goes. 
Does anyone have experience using I2C EEPROMs from
PIC? Specifically, I'm looking for an answer to a
question on the datasheet for the 24LC515 chip.

<http://www.microchip.com/stellent/idcplg?IdcService=SS_GET_PAGE&nodeId=
2057&ty=&dty=Data+Sheets&section=Data+Sheets&ssUserText=24FC515>

The section that describes the Addressing lines
(A0-A2) describes A2 as a non-usable Address line
which must be tied to Vcc for the chip to operate. Unfortunately, it
doesn't say anything more about this address line.

I'm wondering if this is a power-down function, or if
I pulled the A2 line to Vss would the chip be
disabled, yet retain memory... thus in effect allowing
for the selection of up to 8 of these devices on an
I2C bus using three address lines and a signal
inverter on the A2 line between each set of 4 EEPROMs.

I am apparently not too good at divining information
from the MicroChip web site?

Any help or suggestion is welcome.

Cheers

Scott


		
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