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[DPRG] I2C EEPROM Question

Subject: [DPRG] I2C EEPROM Question
From: Rick J. Bickle rbickle at swbell.net
Date: Tue Feb 8 14:06:29 CST 2005


If you need more nonvolatile storage, CF is a good cheap way to go.
You can find interfacing circuitry on www.sandisk.com. I believe they
were the inventors of CF.
The only trick is, if you want to read the CF card on a PC, you will
have to write your own FAT system for it.
Otherwise, the interface is really just a parallel bus arrangement,
similar to IDE.

Or, you could consider using a large flash device on the parallel bus.
You can get these up to a couple of Meg x 8.
Note that your EEPROM was 512K x 1 or 64K x 8.


-----Original Message-----
From: dprglist-bounces at dprg.org [mailto:dprglist-bounces at dprg.org] On
Behalf Of Mr S
Sent: Tuesday, February 08, 2005 12:58 PM
To: Rick J. Bickle; dprglist at dprg.org
Subject: RE: [DPRG] I2C EEPROM Question

I think I'm going to have to experiemnt with it. I had
this idea that I could also hang some 8570 RAM chips
on the same I2C bus, and by using the A2 line as a
chip select funtion, be able to access both at I2C
speeds, provided all the chips support the high speed
I2C protocol. It should be 400K/bps ... and oh yeah,
hang several master nodes on the bus too... 

Technically, I was thinking that there would be a lot
of expandability of the RAM/EEPROM if there is a chip
select function (selecting 4 chips at a time). I
realize there is much more to it, capacitance etc.

Of course, this might just be the indication that
recreational drugs are still banging around in my gray
matter somewhere... or that I should look at
implementing CF card access?


--- "Rick J. Bickle" <rbickle at swbell.net> wrote:

> Scott,
> Since the datasheet describes pin A2 as a "chip
> select", you should be
> able to use it as such.
> When "1", the chip will respond to the I2C bus, when
> "0" it will not.
> You could have multiple banks of 4 devices per bank
> switched with the A2
> pin.
> Also, there is a "b" version of these chips which
> ignores the address
> bits. Make sure you don't get that one.
> If you would care for some "bit banging" code for
> I2C, I have written
> it. I have also written interrupt driven I2C code
> for several of the
> Philips '51 derivatives.
> Rick
> -----Original Message-----
> From: dprglist-bounces at dprg.org [mailto:dprglist-bounces at dprg.org] On
> Behalf Of Mr S
> Sent: Monday, February 07, 2005 10:37 PM
> To: dprglist at dprg.org
> Subject: [DPRG] I2C EEPROM Question
> This might be an odd question, but here goes.
> Does anyone have experience using I2C EEPROMs from
> PIC? Specifically, I'm looking for an answer to a
> question on the datasheet for the 24LC515 chip.
> The section that describes the Addressing lines
> (A0-A2) describes A2 as a non-usable Address line
> which must be tied to Vcc for the chip to operate. Unfortunately, it
> doesn't say anything more about this address line.
> I'm wondering if this is a power-down function, or
> if
> I pulled the A2 line to Vss would the chip be
> disabled, yet retain memory... thus in effect
> allowing
> for the selection of up to 8 of these devices on an
> I2C bus using three address lines and a signal
> inverter on the A2 line between each set of 4
> I am apparently not too good at divining information
> from the MicroChip web site?
> Any help or suggestion is welcome.
> Cheers
> Scott
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