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[DPRG] ATmega64 and JTAG problems.

Subject: [DPRG] ATmega64 and JTAG problems.
From: Kipton Moravec kip at kdream.com
Date: Sun Jun 19 08:22:15 CDT 2005

I just built my first board with a ATmega64 and am trying to debug using
JTAG for the first time. A bad combination, because I don't know what is
right and wrong. Or better what is working and what is not.

I have a beefy enough power supply that it should drive the JTAG from
the board power. The voltage stays at 5V. Two lights on the JTAG
interface are on, the third is out, and the JTAG interface is not
recognized by AVR Studio as being attached to the PC.

Fortunately I also brought out the pins for the ISP programming (which
uses the serial port on this chip, which is different than the ATtiny
and ATmega8 chips I have been using in the past) I am also using this
port as a RS-232 port, and have a 10K resistor between the pins I am
using for programming and RS-232 driver chip as the documentation
recommends.

I can program it using the ISP. Sometimes the programming fails and I
have to cycle power, which seems a little flakey. But it will take a
program.

But the program does not appear to be running. At the moment my program
is extremely simple. I am trying to turn on 3 LEDS on the board by
making the output lines go low. (First I set the Direction registers)

The RESET line is high using the standard 4.7K resistor, diode, and 0.1
MFD capacitor circuit in the documentation. So it is not in RESET.

There are some wierd things that are different with this chip than what
I normally deal with.

First is the PEN pin.  It must be held low during a power cycle to let
the processor come up with ISP programming enabled. I can't find in the
documentation if I need to have an external pull-up on this pin or if it
has an internal pull-up. Right now I do not pull it up. (however I am
getting ready to put one on.)

I am wondering if my problem with the JTAG is because I did not have a
pull-up on the TDO pin. I would have guessed the JTAG programmer would
have had it, because I only saw the need for it in the middle of the
JTAG documentation, not on any connection examples. (I am getting ready
to put one on)

Any other ideas?



Kip

P.S. 
Here is my program maybe there is a bug here.


	.INCLUDE "m64def.inc"

;
;	Register names
;
;**************************************************************************
;  REGISTERS
;**************************************************************************

;**************************************************************************
;  SRAM DATA Declarations are here
;**************************************************************************
            .dseg
            .org 0x100

FIFO:        .BYTE   64   ; the boundry at 80 makes the head and tail 
                          ; wrap quicker



;**************************************************************************
;**************************************************************************
.equ     Xtal      = 14745600   ; system clock frequency


;***********************************************
;  PROGRAM START - EXECUTION STARTS HERE
;***********************************************
.cseg
.org    $0

    rjmp    	RESET      	; Program Start
    rjmp	INT0_ISR	; External Interrupt Request 0
    rjmp	INT1_ISR	; External Interrupt Request 1
    rjmp	INT2_ISR	; External Interrupt Request 2
    rjmp	INT3_ISR	; External Interrupt Request 3
    rjmp	INT4_ISR	; External Interrupt Request 4
    rjmp	INT5_ISR	; External Interrupt Request 5
    rjmp	INT6_ISR	; External Interrupt Request 6
    rjmp	INT7_ISR	; External Interrupt Request 7
    rjmp	OC2_ISR		; Timer/Counter2 Compare Match
    rjmp	OVF2_ISR	; Timer/Counter2 Overflow
    rjmp	ICP1_ISR	; Timer/Counter1 Capture Event
    rjmp	OC1A_ISR	; Timer/Counter1 Compare Match A
    rjmp	OC1B_ISR	; Timer/Counter Compare Match B
    rjmp	OVF1_ISR	; Timer/Counter1 Overflow
    rjmp	OC0_ISR	        ; Timer/Counter0 Compare Match
    rjmp	OVF0_ISR	; Timer/Counter0 Overflow
    rjmp	SPI_ISR		; SPI Serial Transfer Complete
    rjmp	URXC0_ISR	; USART0, Rx Complete
    rjmp	UDRE0_ISR	; USART0 Data Register Empty
    rjmp	UTXC0_ISR	; USART0, Tx Complete
    rjmp	ADCC_ISR	; ADC Conversion Complete
    rjmp	ERDY_ISR	; EEPROM Ready
    rjmp	ACI_ISR		; Analog Comparator
    rjmp	OC1C_ISR	; Timer/Counter1 Compare Match C
    rjmp	ICP3_ISR	; Timer/Counter3 Capture Event
    rjmp	OC3A_ISR	; Timer/Counter3 Compare Match A
    rjmp	OC3B_ISR	; Timer/Counter3 Compare Match B
    rjmp	OC3C_ISR	; Timer/Counter3 Compare Match C
    rjmp	OVF3_ISR	; Timer/Counter3 Overflow
    rjmp	URXC1_ISR	; USART1, Rx Complete
    rjmp	UDRE1_ISR	; USART1, Data Register Empty
    rjmp	UTXC1_ISR	; USART1, Tx Complete
    rjmp	TWI_ISR		; 2-wire Serial Interface
    rjmp	SPMR_ISR	; Store Program Memory Read

;
;   Unused Interrupts
;
INT0_ISR:	; External Interrupt Request 0
INT1_ISR:	; External Interrupt Request 1
INT2_ISR:	; External Interrupt Request 2
INT3_ISR:	; External Interrupt Request 3
INT4_ISR:	; External Interrupt Request 4
INT5_ISR:	; External Interrupt Request 5
INT6_ISR:	; External Interrupt Request 6
INT7_ISR:	; External Interrupt Request 7
OC2_ISR:	; Timer/Counter2 Compare Match
OVF2_ISR:	; Timer/Counter2 Overflow
ICP1_ISR:	; Timer/Counter1 Capture Event
OC1A_ISR:	; Timer/Counter1 Compare Match A
OC1B_ISR:	; Timer/Counter Compare Match B
OVF1_ISR:	; Timer/Counter1 Overflow
OC0_ISR:	; Timer/Counter0 Compare Match
OVF0_ISR:	; Timer/Counter0 Overflow
SPI_ISR:	; SPI Serial Transfer Complete
URXC0_ISR:	; USART0, Rx Complete
UDRE0_ISR:	; USART0 Data Register Empty
UTXC0_ISR:	; USART0, Tx Complete
ADCC_ISR:	; ADC Conversion Complete
ERDY_ISR:	; EEPROM Ready
ACI_ISR:	; Analog Comparator
OC1C_ISR:	; Timer/Counter1 Compare Match C
ICP3_ISR:	; Timer/Counter3 Capture Event
OC3A_ISR:	; Timer/Counter3 Compare Match A
OC3B_ISR:	; Timer/Counter3 Compare Match B
OC3C_ISR:	; Timer/Counter3 Compare Match C
OVF3_ISR:	; Timer/Counter3 Overflow
URXC1_ISR:	; USART1, Rx Complete
UDRE1_ISR:	; USART1, Data Register Empty
UTXC1_ISR:	; USART1, Tx Complete
TWI_ISR:	; 2-wire Serial Interface
SPMR_ISR:	; Store Program Memory Read
    reti

;************************************************
; Interrupt timer0
;************************************************
; I am making some assumptions to make this ISR very short.
; FIFO is at 0x0080 in SRAM and is 32 bytes long
; instead of checking for the maximum we can andi with 0x9f 
; to make the circular buffer wrap



   

;***********************************************************
; Interrupt timer1  // should be disabled happens too often
;***********************************************************


;************************************
; RESET Interrupt -- Start of Program
;************************************
RESET:
    ldi   r16,HIGH(RAMEND)
    out   SPH,r16            ; Initialize Stackpointer
    ldi   r16,LOW(RAMEND)
    out   SPL,r16            ; Initialize Stackpointer

    ldi   r16,0              ; Make sure JTD is 0
    out   MCUCSR,r16

; Setup the ports

    ldi   r16,0xff
    out   DDRA,r16  ; All of PORTA is OUTPUT
    out   DDRB,r16  ; All of PORTB is OUTPUT
    out   DDRC,r16  ; All of PORTC is OUTPUT

    ldi   r16,0xf8
    out   DDRD,r16  ; PORTD Pin 0, 1, and 2 are Input rest are OUTPUT

    ldi   r16,0x0a
    out   DDRE,r16  ; PORTE Pin 1 and 3 are OUTPUT, rest are INPUT

    ldi   r16,0x07
    sts   DDRF,r16  ; PORTF Pin  0, 1, and 2 are OUTPUT rest are INPUT

    ldi   r16,0x1f
    sts   DDRG,r16

; set LEDs
    sbi   PORTE,PORTE3 ; at power up this is ON, trying to turn off
    cbi   PORTD,PORTD7 ; at power up this is OFF, trying to turn on
    cbi   PORTD,PORTD6 ; at power up this is OFF, trying to turn on
    cbi   PORTD,PORTD5 ; at power up this is OFF, trying to turn on

loopforever:
    nop

    cbi   PORTD,PORTD7      ; See if they toggle
    cbi   PORTD,PORTD6
    cbi   PORTD,PORTD5
    nop

    sbi   PORTD,PORTD7
    sbi   PORTD,PORTD6
    sbi   PORTD,PORTD5



    rjmp  loopforever




-- 
Kipton Moravec <kip at kdream.com>


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