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[DPRG] ATmega64 and JTAG problems.

Subject: [DPRG] ATmega64 and JTAG problems.
From: Kipton Moravec kip at kdream.com
Date: Sun Jun 19 17:57:13 CDT 2005

On Sun, 2005-06-19 at 08:32 -0700, Larry Barello wrote:
> I have an m128 board and there are no resisters on the JTAG port and the PEN
> line is tied high (although I believe you can let it float) and it works
> fine with JTAG, ISP and running code. 

The PEN line is confusing to me. You say it is tied high, and you can
use the ISP.  The documentation says it must be tied low to use ISP. 

>From Page 7 of the ATmega64 Documentation.

PEN This is a programming enable pin for the SPI Serial Programming
mode. By holding this pin low during a Power-on Reset, the device will
enter the SPI Serial Programming mode. PEN Has no function during normal
operation.

What I did was let it float (assuming an internal pull-up), and use a
jumper to bring it low when I want to use the ISP.  It seemed like an
awkward way to do it.

>  I don't share the ISP port with the
> serial line (use usart1) which has it's own issues since the USART1
> registers are high and need to use LDS/STS instead of in/out/sbis etc.
> 
> My guess is that if you board isn't working that you have reset or PEN
> pulled low, or there is no clock source (not an issue with JTAG...) 

It will program with ISP but will not run.

The Reset is High, I measured it with my meter. It uses the same circuit
as recommended in their examples.

The PEN is floating, so I am going to pull it high tonight with a 10K or
47K resistor, see if it fixes the running problem.

It is currently using the Internal 8 MHz clock. I have a 14.7... MHz
crystal attached, but have not programmed the fuses to use it yet. If I
did not have a valid clock the ISP would not work.


> Other
> possibilities are no continuity between +5v and the chip (PCB error) or
> ground.

If that is the case, then it would not program and verify with the ISP.
Right?

>   Have you tested continuity between each JTAG pin and the CPU? &
> signals? 

That is a good idea, I will try that tonight.

>  It is easy to get lights turned on without really having power
> connected properly.
> 
> Cheers!
> 

I am going to pull the PEN line high with a 47k Resister, and check the
continuity of the JTAG pins to the processor.

Thanks.
Kip

> 
> -----Original Message-----
> From: dprglist-bounces at dprg.org [mailto:dprglist-bounces at dprg.org]On
> Behalf Of Kipton Moravec
> Sent: Sunday, June 19, 2005 6:22 AM
> To: dprglist
> Subject: [DPRG] ATmega64 and JTAG problems.
> 
> 
> I just built my first board with a ATmega64 and am trying to debug using
> JTAG for the first time. A bad combination, because I don't know what is
> right and wrong. Or better what is working and what is not.
> 
> I have a beefy enough power supply that it should drive the JTAG from
> the board power. The voltage stays at 5V. Two lights on the JTAG
> interface are on, the third is out, and the JTAG interface is not
> recognized by AVR Studio as being attached to the PC.
> 
> Fortunately I also brought out the pins for the ISP programming (which
> uses the serial port on this chip, which is different than the ATtiny
> and ATmega8 chips I have been using in the past) I am also using this
> port as a RS-232 port, and have a 10K resistor between the pins I am
> using for programming and RS-232 driver chip as the documentation
> recommends.
> 
> I can program it using the ISP. Sometimes the programming fails and I
> have to cycle power, which seems a little flakey. But it will take a
> program.
> 
> But the program does not appear to be running. At the moment my program
> is extremely simple. I am trying to turn on 3 LEDS on the board by
> making the output lines go low. (First I set the Direction registers)
> 
> The RESET line is high using the standard 4.7K resistor, diode, and 0.1
> MFD capacitor circuit in the documentation. So it is not in RESET.
> 
> There are some wierd things that are different with this chip than what
> I normally deal with.
> 
> First is the PEN pin.  It must be held low during a power cycle to let
> the processor come up with ISP programming enabled. I can't find in the
> documentation if I need to have an external pull-up on this pin or if it
> has an internal pull-up. Right now I do not pull it up. (however I am
> getting ready to put one on.)
> 
> I am wondering if my problem with the JTAG is because I did not have a
> pull-up on the TDO pin. I would have guessed the JTAG programmer would
> have had it, because I only saw the need for it in the middle of the
> JTAG documentation, not on any connection examples. (I am getting ready
> to put one on)
> 
> Any other ideas?
> 
> 
> 
> Kip

-- 
Kipton Moravec <kip at kdream.com>


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